Minimizing Floating Point Power by Optimizing Operand Range and Precision

GOALS Low-power systems often find the power cost of floating-point hardware prohibitively expensive. This research explores ways of reducing floating-point power consumption by minimizing the bitwidth representation of floating-point data. Analysis of several floating point programs that manipulate low-resolution human sensory data shows that these programs suffer no loss of accuracy even with a significant reduction in bitwidth. Most floating point programs in our benchmark suite maintain the same output even when the mantissa bitwidth is reduced by half. This floating point bitwidth reduction can deliver a significant power saving through the use of a variable bitwidth floating point unit. Our results show that up to 50% reduction in multiplier power can be achieved in the floating-point unit by this bitwidth reduction technique without sacrificing any program accuracy.